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? semiconductor components industries, llc, 2001 april, 2001 rev. 1 1 publication order number: mc100ep16vt/d mc100ep16vt 3.3v / 5vecl differential receiver/driver with variable output swing and internal input termination the mc100ep16vt is a differential receiver functionally equivalent to the 100ep16 with input pins controlling the amplitude of the outputs (pin 1) and providing an internal termination network (pin 4). the v ctrl input pin controls the output amplitude of the ep16vt and is referenced to v cc . (see figure 4.) the operational range of the v ctrl input is from v bb (a supply at v cc 1.42 v, maximum output amplitude) to v cc (minimum output amplitude). v bb is an externally supplied voltage equal to v cc 1.42 v (see figures 2 and 3). a variable resistor between v cc and v bb , with the wiper driving v ctrl , can control the output amplitude. typical application circuits and a v ctrl voltage vs. output amplitude graph are described in this data sheet. when left open, the v ctrl pin will be internally pulled down to v ee and operate as a standard ep16, with 100% output amplitude. the v tt input pin offers an internal termination network for a 50 ohm line impedance environment, shown in figure 1. for further reference, see application note and8020, termination of ecl logic devices. input considerations are required for d and d under no signal conditions to prevent instability. special considerations are required for differential inputs under no signal conditions to prevent instability. ? 220 ps propagation delay ? maximum frequency > 4 ghz typical (see graph) ? the 100 series contains temperature compensation ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = 3.0 v to 5.5 v ? open input default state ? 50 internal termination resistor http://onsemi.com device package shipping ordering information mc100ep16vtd so8 98 units/rail mc100ep16vtdr2 so8 2500 tape & reel mc100ep16vtdt tssop8 100 units/rail mc100ep16vtdtr2 tssop8 2500 tape & reel *for additional information, see application note and8002/d k = mc100 a = assembly location l = wafer lot y = year w = work week marking diagrams* so8 d suffix case 751 alyw kep63 tssop8 dt suffix case 948r alyw kp63 1 8 1 8 1 8 1 8
mc100ep16vt http://onsemi.com 2 1 2 3 45 6 7 8 q v ee v cc figure 1. 8lead pinout (top view) and logic diagram d q d v tt v ctrl 50 d, d ecl data inputs q, q ecl data outputs v ctrl * output swing control v tt termination supply v cc positive supply v ee negative supply pin description 50 * pin will default low when left open. pin function attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor n/a esd protection human body model machine model charged device model > 4 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1.) level 1 flammability rating oxygen index ul94 code v0 a 1/8o 28 to 34 transistor count 140 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d. maximum ratings (note 2.) symbol parameter condition 1 condition 2 rating units v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v 6 v v i pecl mode input volta g e v ee = 0 v v i v cc 6 v v i pecl mode in ut voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 6 v v i out output current continuous surge 50 100 ma ma ta operating temperature range 40 to +85 c t stg storage temperature range 65 to +150 c q ja thermal resistance (junction to ambient) 0 lfpm 500 lfpm 8 soic 8 soic 190 130 c/w c/w q jc thermal resistance (junction to case) std bd 8 soic 41 to 44 c/w q ja thermal resistance (junction to ambient) 0 lfpm 500 lfpm 8 tssop 8 tssop 185 140 c/w c/w q jc thermal resistance (junction to case) std bd 8 tssop 41 to 44 5% c/w t sol wave solder <2 to 3 sec @ 248 c 265 c 2. maximum ratings are those values beyond which device damage may occur.
mc100ep16vt http://onsemi.com 3 dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 3.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 30 36 42 31 38 44 32 40 48 ma v oh output high voltage (max swing) (note 4.) v cc v ctrl v ee 2155 2405 2155 2405 2155 2405 mv v ol output low voltage (max swing) (note 4.) v ctrl v bb 1355 1490 1605 1355 1520 1605 1355 1520 1605 mv v cc v ctrl > v bb see fig.2 see fig.2 see fig.2 v ctrl = v cc (min swing) 2105 2230 2355 2095 2220 2345 2065 2190 2315 v ih d, d input high voltage (single ended) 2075 2420 2075 2420 2075 2420 mv v il d, d input low voltage (single ended) 1490 1675 1490 1675 1490 1675 mv v ctrl input voltage (v ctrl ) v ee v cc v ee v cc v ee v cc mv v ihcmr input high voltage common mode range (differential) (note 5.) 2.0 2.9 2.0 2.9 2.0 2.9 v i ih input high current (v tt open) 150 150 150 m a i il input low current (v tt open) 150 150 150 m a note: ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been establi shed. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 3. input and output parameters vary 1:1 with v cc . v ee can vary +0.3 v to 2.2 v. 4. all loading with 50 ohms to v cc 2.0 volts. v oh does not change with v ctrl . v ol changes with v ctrl . v ctrl is referenced to v cc . 5. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 6.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 30 36 42 31 38 44 32 40 48 ma v oh output high voltage (note 7.) v cc > v ctrl > v ee 3855 3980 4105 3855 3980 4105 3855 3980 4105 mv v ol output low voltage (max swing) (note 7.) v ctrl v bb 3055 3190 3305 3055 3220 3305 3055 3220 3305 mv vcc v ctrl > v bb see fig.2 see fig.2 see fig.2 v ctrl = v cc (min swing) 3805 3930 4055 3795 3920 4045 3765 3890 4015 v ih d, d input high voltage (single ended) 3775 4120 3775 4120 3775 4120 mv v il d, d input low voltage (single ended) 3190 3375 3190 3375 3190 3375 mv v ctrl input voltage (v ctrl ) v ee v cc v ee v cc v ee v cc mv v ihcmr input high voltage common mode range (differential) (note 8.) 2.0 4.6 2.0 4.6 2.0 4.6 v i ih input high current (v tt open) 150 150 150 m a i il input low current (v tt open) 150 150 150 m a note: ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been establi shed. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 6. input and output parameters vary 1:1 with v cc . v ee can vary +2.0 v to 0.5 v. 7. all loading with 50 ohms to v cc 2.0 volts. v oh does not change with v ctrl . v ol changes with v ctrl . v ctrl is referenced to v cc . 8. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc100ep16vt http://onsemi.com 4 dc characteristics, necl v cc = 0 v; v ee = 5.5 v to 3.0 v (note 9.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 30 36 42 31 38 44 32 40 48 ma v oh output high voltage (note 10.) v cc > v ctrl > v ee 1145 1020 895 1145 1020 895 1145 1020 895 mv v ol output low voltage (max swing) (note 10.) v ctrl v bb 1945 1810 1695 1945 1780 1695 1945 1780 1695 mv vcc v ctrl > v bb see fig.2 see fig.2 see fig.2 v ctrl = v cc (min swing) 1195 1070 945 1205 1080 955 1235 1110 985 v ih d, d input high voltage (single ended) 1225 880 1225 880 1225 880 mv v il d, d input low voltage (single ended) 1810 1625 1810 1625 1810 1625 mv v ctrl input voltage (v ctrl ) v ee v cc v ee v cc v ee v cc mv v ihcmr input high voltage common mode range (differential) (note 11.) v ee +2.0 0.4 v ee +2.0 0.4 v ee +2.0 0.4 v i ih input high current (v tt open) 150 150 150 m a i il input low current (v tt open) 150 150 150 m a note: ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been establi shed. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 9. input and output parameters vary 1:1 with v cc . 10. all loading with 50 ohms to v cc 2.0 volts. v oh does not change with v ctrl . v ol changes with v ctrl . v ctrl is referenced to v cc . 11. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. ac characteristics v cc = 0 v; v ee = 3.0 v to 5.5 v or v cc = 3.0 v to 5.5 v; v ee = 0 v (note 12.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle frequency (see figure 8. f max /jitter) > 4 > 4 > 4 ghz t plh , t phl propagation delay to output differential max swing min swing 250 200 300 250 350 300 250 200 300 250 350 300 250 200 300 250 350 300 ps t skew duty cycle skew (note 13.) 5.0 20 5.0 20 5.0 20 ps t jitter cycletocycle jitter (see figure 8. f max /jitter) 0.2 < 1 0.2 < 1 0.2 < 1 ps v pp input voltage swing (differential) (note 14.) 150 800 1200 150 800 1200 150 800 1200 mv t r , t f output rise/fall times max swing q (20% 80%) min swing 70 30 120 80 170 130 80 20 130 70 180 120 100 20 150 70 200 120 ps 12. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 ohms to v cc 2.0 v. 13. skew is measured between outputs under identical transitions. duty cycle skew is defined only for differential operation whe n the delays are measured from the cross point of the inputs to the cross point of the outputs. 14. v pp (min) is minimum input swing for which ac parameters are guaranteed.
mc100ep16vt http://onsemi.com 5 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 0.0 0.5 1.0 1.5 2.0 figure 2. v cc v ctrl (pin #1) volts (v) output swing (%) figure 3. v cc v ctrl volts (v) v pkpk v oh v ol 1.42 v bb min swing max swing 1.42 v bb
mc100ep16vt http://onsemi.com 6 figure 4. voltage source implementation, v ctrl pin 1 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v ctrl + 50 50 *see figure 9. figure 5. alternative implementations, v ctrl pin 1 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v cc 50 50 v bb v ee *see figure 9. figure 6. standard termination method, v tt pin 4 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v ctrl + 50 50 v cc 2 v *see figure 9.
mc100ep16vt http://onsemi.com 7 figure 7. alternate ayo termination method, v tt pin 4 1 2 3 45 6 7 8 q* v ee v cc d q * d v tt v ctrl v ctrl + 50 50 v ee r t v cc r t 5.0 v 3.3 v 112 46 *see figure 9. 0 100 200 300 400 500 600 700 800 900 1000 0 500 1000 1500 2000 2500 3000 3500 4000 1 2 3 4 5 6 7 8 9 10 figure 8. f max /jitter frequency (mhz) (jitter) 0.25 v below v cc 0.75 v below v cc 1.00 v below v cc 1.25 v below v cc 2.00 v below v cc v outpp (mv) jitter out ps (rms)
mc100ep16vt http://onsemi.com 8 v tt = v cc 2.0 v figure 9. typical termination for output driver and device evaluation (see application note and8020 termination of ecl logic devices.) driver device receiver device q qb d db 50 50 v tt resource reference of application notes an1404 eclinps circuit performance at nonstandard v ih levels an1405 ecl clock distribution techniques an1406 designing with pecl (ecl at +5.0 v) an1504 metastability and the eclinps family an1568 interfacing between lvds and ecl an1650 using wireor ties in eclinps designs an1672 the ecl translator guide and8001 odd number counters design and8002 marking and date codes and8009 eclinps plus spice i/o model kit and8020 termination of ecl logic devices for an updated list of application notes, please see our website at http://onsemi.com.
mc100ep16vt http://onsemi.com 9 package dimensions so8 d suffix plastic soic package case 75107 issue w seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 u s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) t v w 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop8 dt suffix plastic tssop package case 948r02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-.
mc100ep16vt http://onsemi.com 10 notes
mc100ep16vt http://onsemi.com 11 notes
mc100ep16vt http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc100ep16vt/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland

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